This standard specifies a method to construct two-level low-density parity-check (LDPC) codes and to utilize them as the error correction coding (ECC) scheme in non-volatile memories (NVM). The encoding and decoding methods as well as the implications on memory and overall system latency are presented. The simulation results comparing the two-level code construction scheme and the traditional one-level scheme, as well as the parity check matrices for several LDPC code rates and lengths are provided.

定价： 83元 / 折扣价： 71 元

This standard provides guidance for the specification and performance of an arc-flash hazard analysis, in accordance with the process defined in IEEE Std 1584, IEEE Guide for Performing Arc-Flash Hazard Calculations. It provides the minimum scope and deliverables for an arc-flash study.

定价： 59元 / 折扣价： 51 元

This standard provides guidance and checklists for the collection of required data for performing an arc-flash hazard calculation study in accordance with the process defined in IEEE 1584-2018 and IEEE 1584.1-2022 for systems operating at three-phase 50/60 Hz alternating current (AC) 1000 V and below. This standard does not include collection of data required for performing other system studies, such as a short-circuit study and overcurrent protective device coordination study. Results from… read more these system studies are required to conduct an arc-flash hazard calculation study. read less

定价： 65元 / 折扣价： 56 元